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PIC16C770数据手册封面

PIC16C770 Datasheet

  • PIC16C770

  • 18/20-Pin, 8-Bit CMOS Microcontrollers with 10/12-bit A/D

  • 3585.57KB

  • 220页

  • MICROCHIP

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PIC16C717/770/771
5.2.1
SWITCHING PRESCALER ASSIGNMENT
5.3
Timer0 Interrupt
The prescaler assignment is fully under software con-
trol, i.e., it can be changed 鈥渙n-the-fly鈥?during program
execution.
Note:
To avoid an unintended device RESET, a
specific instruction sequence (shown in the
PICmicro鈩?Mid-Range Reference Man-
ual, DS33023) must be executed when
changing the prescaler assignment from
Timer0 to the WDT. This sequence must
be followed even if the WDT is disabled.
The TMR0 interrupt is generated when the TMR0 reg-
ister overflows from FFh to 00h. This overflow sets bit
T0IF (INTCON<2>). The interrupt can be masked by
clearing bit T0IE (INTCON<5>). Bit T0IF must be
cleared in software by the Timer0 module interrupt ser-
vice routine before re-enabling this interrupt. The
TMR0 interrupt cannot awaken the processor from
SLEEP since the timer is shut off during SLEEP.
FIGURE 5-2:
BLOCK DIAGRAM OF THE TIMER0/WDT PRESCALER
Data Bus
8
1
0
M
U
X
SYNC
2
Cycles
TMR0 reg
CLKOUT (= F
OSC
/4)
0
RA4/T0CKI
Pin
1
T0SE
M
U
X
T0CS
PSA
Set flag bit T0IF
on Overflow
0
M
U
X
8-bit Prescaler
8
8 - to - 1MUX
PS<2:0>
Watchdog
Timer
1
PSA
0
MUX
1
PSA
WDT Enable Bit
WDT
Time-out
Note:
T0CS, T0SE, PSA, PS<2:0> are (OPTION_REG<5:0>).
TABLE 5-1:
Address
01h,101h
0Bh,8Bh,
10Bh,18Bh
81h,181h
85h
REGISTERS ASSOCIATED WITH TIMER0
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on:
POR,
BOR
xxxx xxxx
T0IE
T0CS
INTE
T0SE
RBIE
PSA
T0IF
PS2
INTF
PS1
RBIF
PS0
0000 000x
1111 1111
1111 1111
Value on all
other resets
uuuu uuuu
0000 000u
1111 1111
1111 1111
Name
TMR0
INTCON
OPTION_REG
TRISA
Timer0 register
GIE
PEIE
RBPU INTEDG
PORTA Data Direction Register
Legend:
x
= unknown,
u
= unchanged,
-
= unimplemented locations read as 鈥?鈥? Shaded cells are not used by Timer0.
DS41120A-page 48
Advanced Information
漏
1999 Microchip Technology Inc.

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