鈥?/div>
0--- 0000
xxxx xxxx uuuu uuuu
Legend:
x
= unknown,
u
= unchanged,
q
= value depends on condition, - = unimplemented read as 鈥?鈥? r = reserved.
Shaded locations are unimplemented, read as 鈥?鈥?
Note 1:
The upper byte of the program counter is not directly accessible. PCLATH is a holding register for the PC<12:8> whose
contents are transferred to the upper byte of the program counter.
2:
Other (non power-up) resets include external reset through MCLR and Watchdog Timer Reset.
3:
Bits PSPIE and PSPIF are reserved on the 28-pin devices; always maintain these bits clear.
4:
These registers can be addressed from any bank.
5:
PORTD, PORTE, TRISD, and TRISE are not physically implemented on the 28-pin devices, read as 鈥?鈥?
6:
PIR2<6> and PIE2<6> are reserved on these devices; always maintain these bits clear.
DS30292B-page 16
漏
1999 Microchip Technology Inc.