enable any peripheral interrupt.
the peripheral interrupts.
read as 鈥?鈥?/div>
- n= Value at POR reset
PSPIE
(1)
ADIE
TMR2IE TMR1IE
bit 7:
PSPIE
(1)
:
Parallel Slave Port Read/Write Interrupt Enable bit
1
= Enables the PSP read/write interrupt
0
= Disables the PSP read/write interrupt
ADIE:
A/D Converter Interrupt Enable bit
1
= Enables the A/D converter interrupt
0
= Disables the A/D converter interrupt
RCIE:
USART Receive Interrupt Enable bit
1
= Enables the USART receive interrupt
0
= Disables the USART receive interrupt
TXIE:
USART Transmit Interrupt Enable bit
1
= Enables the USART transmit interrupt
0
= Disables the USART transmit interrupt
SSPIE:
Synchronous Serial Port Interrupt Enable bit
1
= Enables the SSP interrupt
0
= Disables the SSP interrupt
CCP1IE:
CCP1 Interrupt Enable bit
1
= Enables the CCP1 interrupt
0
= Disables the CCP1 interrupt
TMR2IE:
TMR2 to PR2 Match Interrupt Enable bit
1
= Enables the TMR2 to PR2 match interrupt
0
= Disables the TMR2 to PR2 match interrupt
TMR1IE:
TMR1 Overflow Interrupt Enable bit
1
= Enables the TMR1 overflow interrupt
0
= Disables the TMR1 overflow interrupt
bit 6:
bit 5:
bit 4:
bit 3:
bit 2:
bit 1:
bit 0:
Note 1:
PSPIE is reserved on 28-pin devices; always maintain this bit clear.
漏
1999 Microchip Technology Inc.
DS30292B-page 21