鈥?/div>
Bit 0
RBIF
TMR1IF
TMR1IE
CCP2IF
CCP2IE
POR,
BOR
0000 000x
0000 0000
0000 0000
-r-0 0--0
-r-0 0--0
xxxx xxxx
MCLR,
WDT
0000 000u
0000 0000
0000 0000
-r-0 0--0
-r-0 0--0
uuuu uuuu
0000 0000
0000 0000
0000 0000
Synchronous Serial Port Receive Buffer/Transmit Register
WCOL
GCEN
SMP
SSPOV
ACKSTAT
CKE
SSPEN
ACKDT
D/A
CKP
ACKEN
P
SSPM3
RCEN
S
SSPM2
PEN
R/W
SSPM1
RSEN
UA
SSPM0
SEN
BF
0000 0000
0000 0000
0000 0000
Legend:
x
= unknown,
u
= unchanged,
-
= unimplemented read as 鈥?鈥? Shaded cells are not used by the SSP in
Note 1:
These bits are reserved on the 28-pin devices; always maintain these bits clear.
2:
These bits are reserved on these devices; always maintain these bits clear.
I
2
C
mode.
漏
1999 Microchip Technology Inc.
DS30292A-page 75