PIC16F87X Datasheet

IC型号：
PIC16F87X
PDF描述：
28/40-pin 8-Bit CMOS FLASH Microcontrollers
文件大小：
1377.31KB
芯片厂家：

阅览下载纠错 0

扫码查看芯片数据手册

上传产品规格书

PDF预览

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200

PIC16F87X

3.2

PORTB and the TRISB Register

PORTB is an 8-bit wide, bi-directional port. The corre-

sponding data direction register is TRISB. Setting a

TRISB bit (=1) will make the corresponding PORTB pin

an input (i.e., put the corresponding output driver in a

hi-impedance mode). Clearing a TRISB bit (=0) will

make the corresponding PORTB pin an output (i.e., put

the contents of the output latch on the selected pin).

Three pins of PORTB are multiplexed with the Low Volt-

age Programming function; RB3/PGM, RB6/PGC and

RB7/PGD. The alternate functions of these pins are

described in the Special Features Section.

Each of the PORTB pins has a weak internal pull-up. A

single control bit can turn on all the pull-ups. This is per-

formed by clearing bit RBPU (OPTION_REG<7>). The

weak pull-up is automatically turned off when the port

pin is configured as an output. The pull-ups are dis-

abled on a Power-on Reset.

This interrupt can wake the device from SLEEP. The

user, in the interrupt service routine, can clear the inter-

rupt in the following manner:

Any read or write of PORTB. This will end the

mismatch condition.

Clear flag bit RBIF.

A mismatch condition will continue to set flag bit RBIF.

Reading PORTB will end the mismatch condition and

allow flag bit RBIF to be cleared.

The interrupt on change feature is recommended for

wake-up on key depression operation and operations

where PORTB is only used for the interrupt on change

feature. Polling of PORTB is not recommended while

using the interrupt on change feature.

This interrupt on mismatch feature, together with soft-

ware configureable pull-ups on these four pins, allow

easy interface to a keypad and make it possible for

wake-up on key-depression. Refer to the Embedded

Control Handbook,

鈥淚mplementing Wake-Up on Key

Stroke鈥?/div>

(AN552).

RB0/INT is an external interrupt input pin and is config-

ured using the INTEDG bit (OPTION_REG<6>).

RB0/INT is discussed in detail in Section 12.10.1.

FIGURE 3-3:

RBPU

(2)

BLOCK DIAGRAM OF

RB3:RB0 PINS

weak

P pull-up

Data Latch

TRIS Latch

I/O

(1)

Data Bus

WR Port

FIGURE 3-4:

BLOCK DIAGRAM OF

RB7:RB4 PINS

weak

P pull-up

Data Latch

TRIS Latch

I/O

(1)

RBPU

(2)

TTL

Input

Buffer

WR TRIS

Data Bus

WR Port

RD TRIS

RD Port

WR TRIS

TTL

Input

Buffer

RB0/INT

RB3/PGM

Schmitt Trigger

Buffer

Note

RD Port

RD TRIS

Latch

I/O pins have diode protection to V

and V

To enable weak pull-ups, set the appropriate TRIS bit(s)

and clear the RBPU bit (OPTION_REG<7>).

RD Port

Set RBIF

Four of PORTB鈥檚 pins, RB7:RB4, have an interrupt on

change feature. Only pins configured as inputs can

cause this interrupt to occur (i.e. any RB7:RB4 pin con-

figured as an output is excluded from the interrupt on

change comparison). The input pins (of RB7:RB4) are

compared with the old value latched on the last read of

PORTB. The 鈥渕ismatch鈥?outputs of RB7:RB4 are

OR鈥檈d together to generate the RB Port Change Inter-

rupt with flag bit RBIF (INTCON<0>).

Note:

From other

RB7:RB4 pins

RD Port

RB7:RB6 in serial programming mode

Note

I/O pins have diode protection to V

and V

To enable weak pull-ups, set the appropriate TRIS bit(s)

and clear the RBPU bit (OPTION_REG<7>).

When using Low Voltage ICSP Programming (LVP) and the pull-ups on PORTB are enabled, bit 3 in the

TRISB register must be cleared to disable the pull-up on RB3 and ensure the proper operation of the device.

漏

1999 Microchip Technology Inc.

DS30292B-page 31

prev next

PIC16F87X相关型号PDF文件下载

型号

版本

描述

厂商

下载
PIC12

英文版

8-Pin FLASH-Based 8-Bit CMOS Microcontrollers

PIC12
PIC12

英文版

8-Pin, 8-Bit CMOS Microcontroller with EEPROM Data Memory

MICROCHIP ...

PIC12
PIC12

英文版

8-Pin, 8-Bit CMOS Microcontroller with A/D Converter and EEP...

MICROCHIP ...

PIC12
PIC12

英文版

8-Pin, 8-Bit CMOS Microcontrollers

MICROCHIP ...

PIC12
PIC12

英文版

EPROM Memory Programming Specification

MICROCHIP ...

PIC12
PIC12

英文版

8-Pin FLASH-Based 8-Bit CMOS Microcontrollers

MICROCHIP ...

PIC12
PIC18

英文版

Microcontroller

PIC18
PIC10F

英文版

Microcontroller

PIC10F
PIC1657

英文版

Microcontroller

ETC

PIC1657
PIC16C5

英文版

EPROM-Based 8-Bit CMOS Microcontroller

PIC16C5
PIC12C50

英文版

8-Pin, 8-Bit CMOS Microcontrollers

PIC12C50
PIC12C50

英文版

8-Pin, 8-Bit CMOS Microcontrollers

MICROCHIP ...

PIC12C50
PIC12C5X

英文版

ETC

PIC12C5X
PIC12C67

英文版

EPROM Memory Programming Specification

PIC12C67
PIC12C67

英文版

EPROM Memory Programming Specification

MICROCHIP ...

PIC12C67
PIC14000

英文版

28-Pin Programmable Mixed Signal Controller

PIC14000
PIC14000

英文版

EPROM Memory Programming Specification

PIC14000
PIC1657I

英文版

Microcontroller

ETC

PIC1657I
PIC1657M

英文版

Microcontroller

ETC

PIC1657M
PIC16C52

英文版

EPROM/ROM-Based 8-Bit CMOS Microcontroller Series

PIC16C52

PIC16F87X Datasheet

PDF预览

PIC16F87X相关型号PDF文件下载

您可能感兴趣的PDF文件资料

热门IC型号推荐

PIC16F87X Datasheet

PDF预览

PIC16F87X相关型号PDF文件下载

您可能感兴趣的PDF文件资料

热门IC型号推荐

建议反馈

PDF纠错X