Switch MII receive bit 1. Strap option: PD (default) = Switch MII in
100Mbps mode; PU = Switch MII in 10Mbps mode.
PD (default) = Mode 0; PU = Mode 1. See
鈥淩egister 11.鈥?/div>
Mode 0
LEDX_2
LEDX_1
LEDX_0
84
85
86
SCOL
SCRS
SCONF1
Ipd/O
Ipd/O
Ipd
Switch MII collision detect
Switch MII carrier sense
Dual MII configuration pin
Pin# (91, 86, 87):
000
001
010
011
100
101
110
111
87
88
89
90
91
92
93
94
95
96
97
Note:
1. P = Power supply
I = Input
O = Output
I/O = Bi-directional
Gnd = Ground
Ipu = Input w/ internal pull-up
Ipd = Input w/ internal pull-down
Ipd/O = Input w/ internal pull-down during reset, output pin otherwise
Ipu/O = Input w/ internal pull-up during reset, output pin otherwise
PU = Strap pin pull-up
PD = Strap pin pull-down
Otri = Output tristated
NC = No Connect
Micrel
Mode 1
100Lnk/Act
10Lnk/Act
Fulld
Lnk/Act
Fulld/Col
Speed
Switch MII
Disable, Otri
PHY Mode MII
MAC Mode MII
PHY Mode SNI
Disable
PHY Mode MII
MAC Mode MII
PHY Mode SNI
PHY [5] MII
Disable, Otri
Disable, Otri
Disable, Otri
Disable, Otri
Disable
PHY Mode MII
PHY Mode MII
PHY Mode MII
SCONF0
GNDD
VDDC
LED5-2
LED5-1
LED5-0
LED4-2
LED4-1
LED4-0
LED3-2
LED3-1
Ipd
Gnd
P
Ipu/O
Ipu/O
Ipu/O
Ipu/O
Ipu/O
Ipu/O
Ipu/O
Ipu/O
5
5
5
4
4
4
3
3
Dual MII configuration pin
Digital ground
1.8V digital core V
DD
LED indicator 2. Strap option: Aging setup. See
鈥淎ging鈥?/div>
section
PU (default) = Aging Enable; PD = Aging disable.
LED indicator 1. Strap option: PU (default): enable PHY MII I/F
PD: tristate all PHY MII output. See
鈥減in# 86 SCONF1.鈥?/div>
LED indicator 0
LED indicator 2
LED indicator 1
LED indicator 0
LED indicator 2
LED indicator 1
M9999-120403
12
December 2003
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