PIC16CE625 Datasheet

  • PIC16CE625

  • OTP 8-Bit CMOS MCU with EEPROM Data Memory

  • 1208.41KB

  • 113页

  • Microchip

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PIC16CE62X
8.4
Comparator Response Time
8.5
Comparator Outputs
Response time is the minimum time, after selecting a
new reference voltage or input source, before the
comparator output is guaranteed to have a valid level.
If the internal reference is changed, the maximum
delay of the internal voltage reference must be
considered when using the comparator outputs.
Otherwise the maximum delay of the comparators
should be used (Table 13-2
).
The comparator outputs are read through the CMCON
register. These bits are read only. The comparator
outputs may also be directly output to the RA3 and RA4
I/O pins. When the CM<2:0> = 110, multiplexors in the
output path of the RA3 and RA4 pins will switch and the
output of each pin will be the unsynchronized output of
the comparator. The uncertainty of each of the
comparators is related to the input offset voltage and
the response time given in the speci铿乧ations.
Figure 8-4 shows the comparator output block
diagram.
The TRISA bits will still function as an output
enable/disable for the RA3 and RA4 pins while in this
mode.
Note 1:
When reading the PORT register, all pins
con铿乬ured as analog inputs will read as
a 鈥?鈥? Pins con铿乬ured as digital inputs will
convert an analog input according to the
Schmitt Trigger input speci铿乧ation.
2:
Analog levels on any pin that is de铿乶ed
as a digital input may cause the input
buffer to consume more current than is
speci铿乪d.
FIGURE 8-4:
COMPARATOR OUTPUT BLOCK DIAGRAM
Port Pins
MULTIPLEX
+
To RA3 or
RA4 Pin
Bus
Data
RD CMCON
Q
D
EN
-
Set
CMIF
Bit
Q
From
Other
Comparator
D
EN
CL
RD CMCON
NRESET
DS40182A-page 44
Preliminary
1998 Microchip Technology Inc.

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