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PIC16CE625 Datasheet

  • PIC16CE625

  • OTP 8-Bit CMOS MCU with EEPROM Data Memory

  • 1208.41KB

  • 113页

  • Microchip

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PIC16CE62X
3.0
ARCHITECTURAL OVERVIEW
The high performance of the PIC16CE62X family can
be attributed to a number of architectural features
commonly found in RISC microprocessors. To begin
with, the PIC16CE62X uses a Harvard architecture, in
which, program and data are accessed from separate
memories using separate busses. This improves
bandwidth over traditional von Neumann architecture
where program and data are fetched from the same
memory. Separating program and data memory further
allows instructions to be sized differently than 8-bit
wide data word. Instruction opcodes are 14-bits wide
making it possible to have all single word instructions.
A 14-bit wide program memory access bus fetches a
14-bit instruction in a single cycle. A two-stage pipeline
overlaps fetch and execution of instructions.
Consequently, all instructions (35) execute in a sin-
gle-cycle (200 ns @ 20 MHz) except for program
branches.
The PIC16CE623 addresses 512 x 14 on-chip program
memory. The PIC16CE624 addresses 1K x 14 program
memory. The PIC16CE625 addresses 2K x 14 program
memory. All program memory is internal.
The PIC16CE62X can directly or indirectly address its
register 铿乴es or data memory. All special function
registers including the program counter are mapped in
the data memory. The PIC16CE62X have an orthogo-
nal (symmetrical) instruction set that makes it possible
to carry out any operation on any register using any
addressing mode. This symmetrical nature and lack of
鈥榮pecial optimal situations鈥?make programming with the
PIC16CE62X simple yet ef铿乧ient. In addition, the
learning curve is reduced signi铿乧antly.
The PIC16CE62X devices contain an 8-bit ALU and
working register. The ALU is a general purpose
arithmetic unit. It performs arithmetic and Boolean
functions between data in the working register and any
register 铿乴e.
The ALU is 8-bit wide and capable of addition,
subtraction, shift and logical operations. Unless
otherwise mentioned, arithmetic operations are two's
complement in nature. In two-operand instructions,
typically one operand is the working register
(W register). The other operand is a 铿乴e register or an
immediate constant. In single operand instructions, the
operand is either the W register or a 铿乴e register.
The W register is an 8-bit working register used for ALU
operations. It is not an addressable register.
Depending on the instruction executed, the ALU may
affect the values of the Carry (C), Digit Carry (DC), and
Zero (Z) bits in the STATUS register. The C and DC bits
operate as a Borrow and Digit Borrow out bit,
respectively, bit in subtraction. See the
SUBLW
and
SUBWF
instructions for examples.
A simpli铿乪d block diagram is shown in Figure 3-1, with
a description of the device pins in Table 3-1.
漏
1998 Microchip Technology Inc.
Preliminary
DS40182A-page 7

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