鈥?/div>
Units Conditions
MHz
MHz
kHz
MHz
MHz
MHz
kHz
ns
ns
碌s
ns
ns
ns
碌s
碌s
ns
碌s
ns
ns
ns
ns
XT and RC osc mode, V
DD
=5.0V
HS osc mode
LP osc mode
RC osc mode, V
DD
=5.0V
XT osc mode
HS osc mode
LP osc mode
XT and RC osc mode
HS osc mode
LP osc mode
RC osc mode
XT osc mode
HS osc mode
LP osc mode
Sym
Fos
1
Tosc
External CLKIN Period
(Note 1)
Oscillator Period
(Note 1)
2
3*
T
CY
TosL,
TosH
Instruction Cycle Time (Note 1)
External Clock in (OSC1) High or
Low Time
T
CYS
=F
OSC
/4
XT oscillator, T
OSC
L/H duty cycle
LP oscillator, T
OSC
L/H duty cycle
HS oscillator, T
OSC
L/H duty
cycle
XT oscillator
LP oscillator
HS oscillator
4*
TosR,
TosF
External Clock in (OSC1) Rise or
Fall Time
25*
50*
15*
These parameters are characterized but not tested.
Data in "Typ" column is at 5.0V, 25掳C unless otherwise stated. These parameters are for design guidance
only and are not tested.
Note 1: Instruction cycle period (T
CY
) equals four times the input oscillator time-base period. All speci铿乪d values are
based on characterization data for that particular oscillator type under standard operating conditions with the
device executing code. Exceeding these speci铿乪d limits may result in an unstable oscillator operation and/or
higher than expected current consumption. All devices are tested to operate at "min." values with an exter-
nal clock applied to the OSC1 pin.
When an external clock input is used, the "Max." cycle time limit is "DC" (no clock) for all devices.
*
鈥?/div>
DS40182A-page 88
Preliminary
漏
1998 Microchip Technology Inc.
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