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PIC16CR83数据手册封面

PIC16CR83 Datasheet

  • PIC16CR83

  • 18-pin Flash/EEPROM 8-Bit Microcontrollers

  • 2018.18KB

  • 125页

  • MICROCHIP

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PIC16F8X
5.0
I/O PORTS
EXAMPLE 5-1:
CLRF
PORTA
INITIALIZING PORTA
;
;
;
;
;
;
;
;
;
;
;
Initialize PORTA by
setting output
data latches
Select Bank 1
Value used to
initialize data
direction
Set RA<3:0> as inputs
RA4 as outputs
TRISA<7:5> are always
read as '0'.
The PIC16F8X has two ports, PORTA and PORTB.
Some port pins are multiplexed with an alternate func-
tion for other features on the device.
5.1
PORTA and TRISA Registers
BSF
MOVLW
STATUS, RP0
0x0F
PORTA is a 5-bit wide latch. RA4 is a Schmitt Trigger
input and an open drain output. All other RA port pins
have TTL input levels and full CMOS output drivers. All
pins have data direction bits (TRIS registers) which can
con铿乬ure these pins as output or input.
Setting a TRISA bit (=1) will make the corresponding
PORTA pin an input, i.e., put the corresponding output
driver in a hi-impedance mode. Clearing a TRISA bit
(=0) will make the corresponding PORTA pin an output,
i.e., put the contents of the output latch on the selected
pin.
Reading the PORTA register reads the status of the pins
whereas writing to it will write to the port latch. All write
operations are read-modify-write operations. So a write
to a port implies that the port pins are 铿乺st read, then this
value is modi铿乪d and written to the port data latch.
The RA4 pin is multiplexed with the TMR0 clock input.
MOVWF
TRISA
FIGURE 5-2:
Data
bus
WR
PORT
BLOCK DIAGRAM OF PIN RA4
D
Q
Q
CK
N
Data Latch
V
SS
D
Q
Q
RA4 pin
WR
TRIS
CK
TRIS Latch
FIGURE 5-1:
Data
bus
D
WR
Port
BLOCK DIAGRAM OF PINS
RA3:RA0
RD TRIS
Q
V
DD
Q
Schmitt
Trigger
input
buffer
D
EN
EN
CK
Q
P
RD PORT
Data Latch
N
D
WR
TRIS
Q
V
SS
CK
Q
TTL
input
buffer
I/O pin
TMR0 clock input
Note: I/O pin has protection diodes to V
SS
only.
TRIS Latch
RD TRIS
Q
D
EN
RD PORT
Note: I/O pins have protection diodes to V
DD
and V
SS
.
漏
1998 Microchip Technology Inc.
DS30430C-page 21

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