PIC16CR83 Datasheet

IC型号：
PIC16CR83
PDF描述：
18-pin Flash/EEPROM 8-Bit Microcontrollers
文件大小：
2018.18KB
PDF页数：
125页
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PIC16F8X

NOP

Syntax:

Operands:

Operation:

Status Affected:

Encoding:

Description:

Words:

Cycles:

Q Cycle Activity:

Decode

No Operation

[

label

]

None

No operation

None

0000

0xx0

0000

RETFIE

Syntax:

Operands:

Operation:

Status Affected:

Encoding:

Description:

Return from Interrupt

[

label

]

None

TOS

鈫?/div>

PC,

鈫?/div>

GIE

None

0000

1001

Return from Interrupt. Stack is POPed

and Top of Stack (TOS) is loaded in the

PC. Interrupts are enabled by setting

Global Interrupt Enable bit, GIE

(INTCON<7>). This is a two cycle

instruction.

NOP

RETFIE

No operation.

Words:

No-Opera No-Opera No-Operat

tion

ion

Decode

Example

NOP

Cycles:

Q Cycle Activity:

1st Cycle

2nd Cycle

No-Opera

tion

Set the

GIE bit

Pop from

the Stack

No-Operat

ion

No-Opera No-Opera No-Operat

tion

ion

Example

RETFIE

After Interrupt

PC =

GIE =

TOS

OPTION

Syntax:

Operands:

Operation:

Encoding:

Description:

Load Option Register

[

label

]

None

(W)

鈫?/div>

OPTION

0000

0110

0010

OPTION

Status Affected: None

The contents of the W register are

loaded in the OPTION register. This

instruction is supported for code com-

patibility with PIC16C5X products.

Since OPTION is a readable/writable

it.

Words:

Cycles:

Example

To maintain upward compatibility

with future PIC16CXX products,

do not use this instruction.

漏

1998 Microchip Technology Inc.

DS30430C-page 63

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