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SC16C754BIBM-S Datasheet

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Philips Semiconductors
SC16C754
Quad UART with 64-byte FIFO
7.6 Modem control register (MCR)
The MCR controls the interface with the mode, data set, or peripheral device that is
emulating the modem.
Table 14
shows modem control register bit settings.
Table 14:
Bit
7
Modem Control Register bits description
Symbol
MCR[7]
[1]
Description
Clock select.
Logic 0 = Divide-by-1 clock input.
Logic 1 = Divide-by-4 clock input.
6
MCR[6]
[1]
TCR and TLR enable.
Logic 0 = no action.
Logic 1 = Enable access to the TCR and TLR registers.
5
MCR[5]
[1]
Xon Any.
Logic 0 = Disable Xon Any function.
Logic 1 = Enable Xon Any function.
4
MCR[4]
Enable loop-back.
Logic 0 = Normal operating mode.
Logic 1 = Enable local loop-back mode (internal). In this mode the
MCR[3:0] signals are looped back into MSR[7:4] and the TX output
is looped back to the RX input internally.
3
MCR[3]
IRQ enable OP.
Logic 0 = Forces INTA-INTB outputs to the 3-State mode and OP
output to HIGH state.
Logic 1 = Forces the INTA-INTB outputs to the active state and OP
output to LOW state. In loop-back mode, controls MSR[7].
2
MCR[2]
FIFO Ready enable.
Logic 0 = Disable the FIFO Rdy register.
Logic 1 = Enable the FIFO Rdy register.
In loop-back mode, controls MSR[6].
1
MCR[1]
RTS
Logic 0 = Force RTS output to inactive (HIGH).
Logic 1 = Force RTS output to active (LOW).
In loop-back mode, controls MSR[4]. If Auto-RTS is enabled, the
RTS output is controlled by hardware 铿俹w control.
0
MCR[0]
DTR
Logic 0 = Force DTR output to inactive (HIGH).
Logic 1 = Force DTR output to active (LOW).
In loop-back mode, controls MSR[5].
[1]
MCR[7:5] can only be modi铿乪d when EFR[4] is set, i.e., EFR[4] is a write enable.
9397 750 11618
漏 Koninklijke Philips Electronics N.V. 2003. All rights reserved.
Product data
Rev. 04 鈥?19 June 2003
26 of 49

SC16C754BIBM-S 产品属性

  • NXP

  • UART 接口集成电路

  • 4

  • 5 Mbps

  • 5.5 V

  • 2.25 V

  • 6 mA

  • + 85 C

  • - 40 C

  • LQFP-64

  • Bulk

  • SMD/SMT

  • 2.5 V, 3.3 V, 5 V

  • 250

  • SC16C754BIBM,151

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