DS26502 T1/E1/J1/64KCC BITS Element
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
HW
Mode
7
RAIS-CI
0
X
IMR3
Interrupt Mask Register 3
19h
6
LOTC
0
X
5
BOCC
0
X
4
RFDLAD
0
X
3
RFDLF
0
X
2
TFDLE
0
X
1
RMTCH
0
X
0
RBOC
0
X
Bit 0: Receive BOC Detector Change-of-State Event (RBOC)
0 = interrupt masked
1 = interrupt enabled
Bit 1: Receive FDL Match Event (RMTCH)
0 = interrupt masked
1 = interrupt enabled
Bit 2: TFDL Register Empty Event (TFDLE)
0 = interrupt masked
1 = interrupt enabled
Bit 3: RFDL Register Full Event (RFDLF)
0 = interrupt masked
1 = interrupt enabled
Bit 4: RFDL Abort Detect Event (RFDLAD)
0 = interrupt masked
1 = interrupt enabled
Bit 5: BOC Clear Event (BOCC).
0 = interrupt masked
1 = interrupt enabled
Bit 6: Loss Of Transmit Clock Event (LOTC)
0 = interrupt masked
1 = interrupt enabled
Bit 7: Receive AIS-CI Event (RAIS-CI)
0 = interrupt masked
1 = interrupt enabled
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