TMS320C2811 Datasheet

IC型号：
TMS320C2811
PDF描述：
具有片内 ROM 的 32 位数字信号控制器
文件大小：
2601.82KB
PDF页数：
162页
芯片厂家：
TI

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TMS320F2810, TMS320F2812

DIGITAL SIGNAL PROCESSORS

SPRS174B 鈥?APRIL 2001 鈥?REVISED SEPTEMBER 2001

memory map (continued)

The 鈥淟ow 64K鈥?of the memory address range maps into the data space of the 240x. The 鈥淗igh 64K鈥?of the

memory address range maps into the program space of the 24x/240x. 24x/240x-compatible code will only

execute from the 鈥淗igh 64K鈥?memory area. Hence, the top 32K of Flash and H0 SARAM block can be used to

run 24x/240x-compatible code (if MP/MC mode is low) or, on F2812, code can be executed from XINTF Zone 7

(if MP/MC mode is high).

The XINTF consists of five independent zones. Three zones have their own chip selects and two zones share

a single chip select. Each zone can be programmed with its own timing (wait states) and to either sample or

ignore external ready signal. This makes interfacing to external peripherals easy and glueless.

Note:

The chip selects of XINTF Zone 6 and Zone 7 are merged together into a single chip select (ZCS6AND7).

Refer to the 鈥滶xternal Interface 鈥?XINTF (F2812 only)鈥?section of this data sheet for details.

Peripheral Frame 1, Peripheral Frame 2, and XINTF Zone 1 are grouped together so as to enable these blocks

to be 鈥渨rite/read peripheral block protected鈥? The 鈥減rotected鈥?mode ensures that all accesses to these blocks

happen as written. Because of the C28x pipeline, a write immediately followed by a read, to different memory

locations, will appear in reverse order on the memory bus of the CPU. This can cause problems in certain

peripheral applications where the user expected the write to occur first (as written). The C28x CPU supports

a block protection mode where a region of memory can be protected so as to make sure that operations occur

as written (the penalty is extra cycles are added to align the operations). This mode is programmable and by

default, it will protect the selected zones.

On the F2812, at reset, XINTF Zone 7 is enabled if the XMP/MC signal is pulled high. This signal selects

microprocessor or microcomputer mode of operation. In microprocessor mode, Zone 7 is mapped to high

memory such that the vector table is fetched externally. The Boot ROM is disabled in this mode. In

microcomputer mode, Zone 7 is disabled such that the vectors are fetched from Boot ROM. This allows the user

to either boot from on-chip memory or from off-chip memory. The state of the XMP/MC signal on reset is stored

in an MP/MC mode bit in the XINTCNF2 register. The user can change this mode in software and hence control

the mapping of Boot ROM and XINTF Zone 7. No other memory blocks are affected by XMP/MC.

I/O space is not supported on the F2812 XINTF.

PRODUCT PREVIEW

POST OFFICE BOX 1443

鈥?/div>

HOUSTON, TEXAS 77251鈥?443

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