TMS320C2811 Datasheet

IC型号：
TMS320C2811
PDF描述：
具有片内 ROM 的 32 位数字信号控制器
文件大小：
2601.82KB
PDF页数：
162页
芯片厂家：
TI

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TMS320F2810, TMS320F2812

DIGITAL SIGNAL PROCESSORS

SPRS174B 鈥?APRIL 2001 鈥?REVISED SEPTEMBER 2001

32-bit CPU-Timers 0/1/2 (continued)

Table 43. CPU-Timers 0, 1, 2 Configuration and Control Registers (Continued)

NAME

TIMER2TIM

TIMER2TIMH

TIMER2PRD

TIMER2PRDH

TIMER2TCR

reserved

TIMER2TPR

TIMER2TPRH

reserved

ADDRESS

0x0000鈥?C10

0x0000鈥?C11

0x0000鈥?C12

0x0000鈥?C13

0x0000鈥?C14

0x0000鈥?C15

0x0000鈥?C16

0x0000鈥?C17

0x0000鈥?C18

0x0000鈥?C3F

SIZE (x16)

CPU-Timer 2, Prescale Register

CPU-Timer 2, Prescale Register High

DESCRIPTION

CPU-Timer 2, Counter Register

CPU-Timer 2, Counter Register High

CPU-Timer 2, Period Register

CPU-Timer 2, Period Register High

CPU-Timer 2, Control Register

Table 44. TIMERxTIM Register Bit Definitions

鈥?/div>

PRODUCT PREVIEW

BITS

15:0

NAME

TIM

R/W

RESET

0xFFFF

DESCRIPTION

Timer Counter Registers (TIMH:TIM): The TIM register holds the low 16 bits of the current 32-bit

count of the timer. The TIMH register holds the high 16 bits of the current 32-bit count of the timer.

The TIMH:TIM decrements by one every (TDDRH:TDDR+1) clock cycles, where TDDRH:TDDR

is the timer prescale divide-down value. When the TIMH:TIM decrements to zero, the TIMH:TIM

(TINT) signal is generated.

鈥?x = 0, 1, or 2

Table 45. TIMERxTIMH Register Bit Definitions

鈥?/div>

BITS

15:0

NAME

TIMH

R/W

RESET

0x0000

See description for TIMERxTIM.

DESCRIPTION

鈥?x = 0, 1, or 2

Table 46. TIMERxPRD Register Bit Definitions

鈥?/div>

BITS

15:0

NAME

PRD

R/W

RESET

0xFFFF

DESCRIPTION

Timer Period Registers (PRDH:PRD): The PRD register holds the low 16 bits of the 32-bit period.

The PRDH register holds the high 16 bits of the 32-bit period. When the TIMH:TIM decrements to

zero, the TIMH:TIM register is reloaded with the period value contained in the PRDH:PRD

registers, at the start of the next timer input clock cycle (the output of the prescaler). The

PRDH:PRD contents are also loaded into the TIMH:TIM when you set the timer reload bit (TRB)

in the Timer Control Register (TCR).

鈥?x = 0, 1, or 2

Table 47. TIMERxPRDH Register Bit Definitions

鈥?/div>

BITS

NAME

R/W

RESET

0x0000

See description for TIMERxPRD

DESCRIPTION

15:0

PRDH

鈥?x = 0, 1, or 2

POST OFFICE BOX 1443

鈥?/div>

HOUSTON, TEXAS 77251鈥?443

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