TMS320C2811 Datasheet

IC型号：
TMS320C2811
PDF描述：
具有片内 ROM 的 32 位数字信号控制器
文件大小：
2601.82KB
PDF页数：
162页
芯片厂家：
TI

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TMS320F2810, TMS320F2812

DIGITAL SIGNAL PROCESSORS

SPRS174B 鈥?APRIL 2001 鈥?REVISED SEPTEMBER 2001

general-purpose (GP) timers

There are two GP timers. The GP timer x (x = 1 or 2 for EVA; x = 3 or 4 for EVB) includes:

A 16-bit timer, up-/down-counter, TxCNT, for reads or writes

A 16-bit timer-compare register, TxCMPR (double-buffered with shadow register), for reads or writes

A 16-bit timer-period register, TxPR (double-buffered with shadow register), for reads or writes

A 16-bit timer-control register,TxCON, for reads or writes

Selectable internal or external input clocks

A programmable prescaler for internal or external clock inputs

Control and interrupt logic, for four maskable interrupts:

underflow, overflow, timer compare,

and

period

interrupts

A selectable direction input pin (TDIRx) (to count up or down when directional up- / down-count mode is

selected)

There are three full-compare units on each event manager. These compare units use GP timer1 as the time

base and generate six outputs for compare and PWM-waveform generation using programmable deadband

circuit. The state of each of the six outputs is configured independently. The compare registers of the compare

units are double-buffered, allowing programmable change of the compare/PWM pulse widths as needed.

programmable deadband generator

The deadband generator circuit includes three 8-bit counters and an 8-bit compare register. Desired deadband

values can be programmed into the compare register for the outputs of the three compare units. The deadband

generation can be enabled/disabled for each compare unit output individually. The deadband-generator circuit

produces two outputs (with or without deadband zone) for each compare unit output signal. The output states

of the deadband generator are configurable and changeable as needed by way of the double-buffered ACTRx

PWM waveform generation

Up to eight PWM waveforms (outputs) can be generated simultaneously by each event manager: three

independent pairs (six outputs) by the three full-compare units with

programmable deadbands,

and two

independent PWMs by the GP-timer compares.

POST OFFICE BOX 1443

鈥?/div>

HOUSTON, TEXAS 77251鈥?443

PRODUCT PREVIEW

The GP timers can be operated independently or synchronized with each other. The compare register

associated with each GP timer can be used for compare function and PWM-waveform generation. There are

three continuous modes of operations for each GP timer in up- or up / down-counting operations. Internal or

external input clocks with programmable prescaler are used for each GP timer. GP timers also provide the time

base for the other event-manager submodules: GP timer 1 for all the compares and PWM circuits, GP timer 2/1

for the capture units and the quadrature-pulse counting operations. Double-buffering of the period and compare

registers allows programmable change of the timer (PWM) period and the compare/PWM pulse width as

needed.

full-compare units

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