TMS320C2811 Datasheet

IC型号：
TMS320C2811
PDF描述：
具有片内 ROM 的 32 位数字信号控制器
文件大小：
2601.82KB
PDF页数：
162页
芯片厂家：
TI

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TMS320F2810, TMS320F2812

DIGITAL SIGNAL PROCESSORS

SPRS174B 鈥?APRIL 2001 鈥?REVISED SEPTEMBER 2001

real-time JTAG and analysis

The C28x implements the standard IEEE 1149.1 JTAG interface. Additionally, the C28x supports real-time mode

of operation whereby the contents of memory, peripheral and register locations can be modified while the

processor is running and executing code and servicing interrupts. The user can also single step through

non-time critical code while enabling time-critical interrupts to be serviced without interference. The C28x

implements the real-time mode in hardware within the CPU. This is a unique feature to the C28x, no software

monitor is required. Additionally, special analysis hardware is provided which allows the user to set hardware

breakpoint or data/address watch-points and generate various user selectable break events when a match

occurs.

external interface (XINTF) (F2812 only)

This asynchronous interface consists of 19 address lines, 16 data lines, and four chip-select lines. The

chip-select lines are mapped to five external zones, Zone 0, 1, 2, 6, and 7. Zones 6 and 7 share a single

chip-select. Each of the five zones can be programmed with different number of wait states, strobe signal setup

and hold timing and each zone can be programmed for extending wait states externally or not. The

programmable wait-state, chip-select and programmable strobe timing enables glueless interface to external

memories and peripherals.

flash

The F2812 contains 128K x16 of embedded Flash memory and 2K x16 of OTP memory. The Flash memory

is segregated into eight 4K x16 sized sectors, and six 16K x16 sized sectors. The user can individually erase,

program and validate a sector while leaving other sectors untouched. Special memory pipelining is provided

to enable the Flash module to achieve higher performance. The Flash/OTP is mapped to both program and data

space hence can be used to execute code or store data information.

The F2810 has 64K x 16 of embedded Flash and 2K x 16 of OTP memory.

M0, M1 SARAMs

All C28x devices will contain these two blocks of single access memory, each 1Kx16 in size. The stack pointer

points to the beginning of block M1 on reset. The M0 block overlaps the 240x device B0, B1, B2 RAM blocks

and hence the mapping of data variables on the 240x devices can remain at the same physical address on C28x

devices. The M0 and M1 blocks, like all other memory blocks on C28x devices, are mapped to both program

and data space. Hence, the user can use M0 and M1 to execute code or for data variables. The partitioning is

performed within the linker. The C28x device presents a unified memory map to the programmer. This makes

for easier programming in high-level languages.

L0, L1, H0 SARAMs

The F2810 and the F2812 will contain an additional 16K x 16 of single-access RAM, divided into 3 blocks

(4K + 4K + 8K). Each block can be independently accessed hence minimizing pipeline stalls. Each block is

mapped to both program and data space.

boot ROM

The Boot ROM is factory programmed with boot loading software. Boot-mode signals are provided to tell the

boot loader software, programmed into the Boot ROM, what boot mode to use on power up. The user can select

to boot normally or to download new software from an external connection or to select boot software that is

programmed in the internal Flash. The Boot ROM will also contain standard tables, such as SIN/COS

waveforms, for use in math related algorithms.

POST OFFICE BOX 1443

鈥?/div>

HOUSTON, TEXAS 77251鈥?443

PRODUCT PREVIEW

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