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MSC8101 Datasheet

  • MSC8101

  • Networking Digital Signal Processor

  • 1873.07KB

  • Motorola

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Signals/Connections
1
The MSC8101 external signals are organized into functional groups, as shown in
Table 1-1, Figure 1-1,
and
Figure 1-2. Table 1-1
lists the functional groups, states the number of signal connections in each group, and
references the table that gives details on multiplexed signals within each group.
Figure 1-1
shows MSC8101
external signals organized by function.
Figure 1-2
indicates how the parallel input/output (I/O) ports signals are
multiplexed. Because the parallel I/O design supported by the MSC8101 communications processor module
(CPM) is a subset of the parallel I/O signals supported by the MPC8260 device, port pins are not numbered
sequentially.
Table 1-1.
Functional Group
Power (V
CC
, V
DD
, and GND)
Clock
Reset, configuration, and EOnCE
System bus, HDI16, and interrupts
Memory Controller
CPM Input/Output Parallel Ports
Port A
Port B
Port C
Port D
JTAG Test Access Port
Reserved (denotes connections that are always reserved)
MSC8101
Functional Signal Groupings
Number of Signal
Connections
80
6
11
133
27
26
14
18
8
5
5
Detailed Description
Table 1-2
on page 1-4
Table 1-3
on page 1-4
Table 1-4
on page 1-5
Table 1-5
on page 1-7
Table 1-6
on page 1-13
Table 1-7
on page 1-16
Table 1-8
on page 1-21
Table 1-9
on page 1-24
Table 1-10
on page 1-33
Table 1-11
on page 1-36
Table 1-12
on page 1-36
MSC8101 Technical Data, Rev. 16
Freescale Semiconductor
1-1

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