MSC8101 Datasheet

  • MSC8101

  • Networking Digital Signal Processor

  • 1873.07KB

  • Motorola

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Packaging
3
This chapter provides information about the MSC8101 package, including diagrams of the package pinouts and
tables showing how the signals discussed in
Chapter 1
are allocated. The MSC8101 is available in a 332-pin
lidded flip chip-plastic ball grid array (FC-PBGA).
3.1 FC-PBGA Package Description
Figure 3-1
and
Figure 3-2
show top and bottom views of the FC-PBGA package, including pinouts.
Table 3-1
lists
the MSC8101 signals alphabetically by signal name. Connections with multiple names are listed individually by
each name. Signals with programmable polarity are shown both as signals which are asserted low (default) and
high (that is,
NAME
/
NAME
).
Table 3-2
lists the signals numerically by pin number. Each pin number is listed once
with the various signals that are multiplexed to it. For simplicity, signals with programmable polarity are shown in
this table only with their default name (asserted low).
MSC8101 Technical Data, Rev. 16
Freescale Semiconductor
3-1

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